Process and threads
Process and thread abstractions are used to control the program execution in Phoenix-RTOS.
Process is the abstraction used for resource aggregation and virtual space definition. It may contain one or more multiple threads. The typical resources assigned to process are mutexes, conditionals, file handles etc.
Thread is the smallest unit of execution that is scheduled to particular hardware core by operating system kernel. Kernel supports two types of threads - kernel threads existing only within the kernel and user threads existing only within a process. Each thread contains the small kernel stack used when thread is executing in the kernel mode. User threads additionally contain the user stack located in the process address space and used when thread is executing in the user mode.
Processes and threads on MMU architecture
Process and thread model on MMU architecture has been presented on the following picture.
Process in Phoenix-RTOS can be treated as the resource aggregation entity, passive in terms of processor instruction execution. It provides a memory space and other resources (files, mutexes, conditionals, ports) for executing threads.
Threads are scheduled by operating system kernel to execute on existing hardware cores. The process memory space consists of two parts – user address space managed by executing threads and kernel address space managed by the kernel.
The kernel address space is shared between all of the processes and it is inaccessible when threads are executed on the user level, so it means that executing programs can’t intentionally or unintentionally destroy the kernel data. Address spaces of each process are separated, but they could share some physical memory based on memory objects. Address spaces are implemented using MMU and paging technique. When threads from different processes executes on the same core the address space contexts (MMU data) are switched during the thread scheduling.
Processes and threads on non-MMU architecture
Process and thread model on non-MMU architectures has been presented on the following figure.
The main difference between this model and MMU-based model is the memory address space. On non-MMU architecture all processes share one address space described by one address space map (
vm_map_t), so each of them could interfere with others. In the future memory regions protected by MPU (Memory Protection Unit) will be introduced.